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2013
- Robert Wille; Mathias Soeken; Christian Otterstedt; Rolf Drechsler
Improving the Mapping of Reversible Circuits to Quantum Circuits Using Multiple Target Lines .
In: 18th Asia and South Pacific Design Automation Conference. Asia and South Pacific Design Automation Conference (ASP-DAC-2013), 18th, January 22-25, Yokohama, Japan, IEEE, 2013.
- Robert Wille; Martin Gogolla; Mathias Soeken; Mirco Kuhlmann; Rolf Drechsler
Towards a Generic Verification Methodology for System Models.
In: Design, Automation & Test in Europe. Design, Automation & Test in Europe (DATE-13), March 18-22, Grenoble, France, IEEE, 2013.
- Julia Seiter; Robert Wille; Mathias Soeken; Rolf Drechsler
Determining Relevant Model Elements for the Verification of UML/OCL Specifications.
In: Design, Automation & Test in Europe. Design, Automation & Test in Europe (DATE-13), March 18-22, Grenoble, France, IEEE, 2013.
- Mathias Soeken; Robert Wille; Eugen Kuksa; Rolf Drechsler
Generierung von OCL-Ausdrücken aus natürlichsprachlichen Beschreibungen.
In: 16. ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen". ITG/GMM/GI-Workshop "Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen" (MBMV-13), 16. March 12-14, Rostock, Germany, o.A. 2013.
- Mathias Soeken; Robert Wille; Rolf Drechsler
Formale Verifikation von UML-basierten Spezifikationen - Prüfung der Korrektheit von Systementwürfen vor deren Implementierung.
In: Industrie Management - Zeitschrift für industrielle Geschäftsprozesse, Vol. 01/2013, Pages 44-48, GITO, 2013.
- Robert Wille; Mathias Soeken; Nils Przigoda; Rolf Drechsler
Effect of Negative Control Lines on the Exact Synthesis of Reversible Circuits.
In: Journal of Multiple-Valued Logic and Soft Computing, Vol. o.A. Page o.A. o.A. 2013.
- Laura Tague; Mathias Soeken; Shin-ichi Minato; Rolf Drechsler
Debugging of Reversible Circuits using πDDs.
In: Proceedings of the 43rd International Symposium on Multiple-Valued Logic . The International Symposium on Multiple-Valued Logic (ISMVL-13), 43rd, May 22-24, Toyama, Japan, IEEE, 2013.
- Nabila Abdessaied; Mathias Soeken; Robert Wille; Rolf Drechsler
Exact Template Matching Using Boolean Satisfiability.
In: Proceedings of the 43rd International Symposium on Multiple-Valued Logic . The International Symposium on Multiple-Valued Logic (ISMVL-13), 43rd, May 22-24, Toyama, Japan, IEEE, 2013.
- Melanie Diepenbeck; Mathias Soeken; Daniel Große; Rolf Drechsler
Towards Automatic Scenario Generation from Coverage Information .
In: 8th International Workshop on Automation of Software Test . International Workshop on Automation of Software Test (AST-13), 8th, May 18-19, San Francisco, United States, IEEE, 2013.
- Oliver Keszöcze; Mathias Soeken; Eugen Kuska; Rolf Drechsler
lips: An IDE for Model Driven Engineering based on Natural Language Processing.
In: Workshop on Natural Language Analysis in Software Engineering. Workshop on Natural Language Analysis in Software Engineering (NaturaLiSE-13), May 25, San Francisco, CA, United States, o.A. 2013.
- Mathias Soeken; Michael Kirkedal Thomsen
White Dots do Matter: Rewriting Reversible Logic Circuits.
In: D. Michael Miller; Gerhard W. Dueck (Hrsg.). Proceedings of the 5th Conference on Reversible Computation. Conference on Reversible Computation (RC), 5th, July 4-5, Victoria, BC, Canada, Lecture Notes in Computer Science (LNCS), Springer, 2013.
- Rolf Drechsler; Mathias Soeken
Hardware-Software Co-Visualization: Developing Systems in the Holodeck.
In: IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems . IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-13), April 8-10, Karlovy Vary, Czech Republic, IEEE, 2013.
- Nabila Abdessaied; Robert Wille; Mathias Soeken; Rolf Drechsler
Reducing the Depth of Quantum Circuits Usind Additional Lines.
In: Proceedings of the 5th Conference on Reversible Computation. Conference on Reversible Computation (RC-13), 5th, July 4-5, Victoria , BC, Canada, Lecture Notes in Computer Science (LNCS), Springer, 2013.
2012
- Mathias Soeken; Robert Wille; Christoph Hilken; Nils Przigoda; Rolf Drechsler
Synthesis of Reversible Circuits with Minimal Lines for Large Functions.
In: Conference Proceedings. Asia and South Pacific Design Automation Conference (ASP-DAC-12), 17th, January 30 - February 2, Sydney, New South Wales, Australia, o.A. 2012.
- Robert Wille; Mathias Soeken; Rolf Drechsler
Debugging of Inconsistent UML/OCL Models.
In: Conference Proceedings. Design, Automation & Test in Europe (DATE-12), March 12-16, Dresden, Germany, o.A. 2012.
- Mathias Soeken; Robert Wille; Rolf Drechsler
Eliminating Invariants in UML/OCL Models.
In: Conference Proceedings. Design, Automation & Test in Europe (DATE-12), March 12-16, Dresden, Germany, o.A. 2012.
- Mathias Soeken; Stefan Frehse; Robert Wille; Rolf Drechsler
RevKit: An Open Source Toolkit for the Design of Reversible Circuits.
In: Reversible Computation 2011, Series: Lecture Notes in Computer Science (LNCS) Reversible Computation. Workshop on Reversible Computation (RC-2011), 3rd, July 4-5, Gent, Belgium, Pages 64-76, Lecture Notes in Computer Science (LNCS), Vol. 7165, Springer, 2012.
- Rolf Drechsler; Melanie Diepenbeck; Daniel Große; Ulrich Kühne; Hoang M. Le; Julia Seiter; Mathias Soeken; Robert Wille
Completeness-Driven Development.
In: G. Rozenberg; H.-J. Kreowski; G. Engels; H. Ehrig (Hrsg.). Proceedings of the 6th International Conference on Graph Transformation 2012 "Modeling and Analysis of Dynamic Structures". International Conference on Graph Transformation (ICGT-2012), 6th, - Modeling and Analysis of Dynamic Structures -, September 24-29, Bremen, Germany, Lecture Notes in Computer Science (LNCS), Vol. 7562, Springer, 2012.
- Rolf Drechsler; Mathias Soeken; Robert Wille
Formal Specification Level: Towards Verification-driven Design Based on Natural Language Processing.
In: Proceedings of the Forum on Specification & Design Languages 2012. Forum on Specification & Design Languages (FDL-2012), September 18-20, Vienna, Austria, IEEE, 2012.
- Robert Wille; Mathias Soeken; Eleonora Schönborn; Rolf Drechsler
Circuit Line Minimization in the HDL-based Synthesis of Reversible Logic.
In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI 2012. IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2012), August 19-21, Amherst, Masachusetts, United States, IEEE, 2012.
- Melanie Diepenbeck; Mathias Soeken; Daniel Große; Rolf Drechsler
Behavior Driven Development for Circuit Design and Verification.
In: Proceedings of the IEEE International Workshop on High-Level Design Validation and Test 2012. IEEE International Workshop on High-Level Design Validation and Test (HLDVT-2012), November 9-10, Huntington Beach, CA, United States, IEEE, 2012.
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