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Publication

Early Concolic Testing of Embedded Binaries with Virtual Prototypes: A RISC-V Case Study

Vladimir Herdt; Daniel Große; Hoang M. Le; Rolf Drechsler
In: Design Automation Conference (DAC). Design Automation Conference (DAC-2019), June 2-6, Las Vegas, Nevada, USA, 2019.

Abstract

Extensive testing of IoT SW is very important to prevent errors andsecurity vulnerabilities. In the SW domain the automated concolictesting technique has been shown very effective.In this paper we propose an approach for concolic testing of bina-ries targeting RISC-V systems with peripherals. Our approach worksby integrating theConcolic Testing Engine(CTE) with the architecturespecificInstruction Set Simulator(ISS) inside of aVirtual Prototype(VP). We provide a designatedCTE-interfaceto integrate (SystemC-based) peripherals into the concolic testing by means of SW mod-els. This combination enables a high simulation performance at bi-nary level with comparatively little effort to integrate peripherals withconcolic execution capabilities. Our approach has been effective infinding several buffer overflow related security vulnerabilities in theFreeRTOS TCP/IP stack.