An Efficient Reduction of Common Control Lines for Reversible Circuit Optimization

Arighna Deb, Robert Wille, Rolf Drechsler, Debesh Das

In: 45th International Symposium on Multiple-Valued Logic (ISMVL). IEEE International Symposium on Multiple-Valued Logic (ISMVL-2015) 45th May 18-20 Waterloo Canada 2015.


New prospects in several emerging technologies such as quantum computation and certain aspects of low-power design motivated an intensive consideration of the design of reversible circuits. Since most of the existing synthesis approaches usually generate circuits of high costs, post-synthesis optimization is frequently applied. Here, the reduction of control line connections is a major focus as they are a main reason for high quantum costs in the respective reversible circuits. Previous approaches aimed for exploiting so-called common control lines for this purpose. However, while these solutions indeed lead to substantial improvements in the costs, they inherit some drawbacks and restrictions. In this work, we propose an alternative approach for the reduction of common control lines in reversible circuits, which is based in the concepts of previously proposed solutions, but combines them in a new fashion. This enables us to achieve the same or even better improvements, while – at the same time – overcome their drawbacks. Experimental evaluations confirm these benefits, i.e. significant improvements compared to the previous methods can often be achieved without the need to deal with their drawbacks.

Deutsches Forschungszentrum für Künstliche Intelligenz
German Research Center for Artificial Intelligence