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Publikationen

Seite 1 von 59.

  1. In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 1/2024.

  2. Security Coverage Metrics for Information Flow at the System Level

    In: 29th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2024), January …

  3. Simranjeet Singh; Chandan Kumar Jha; Vikas Rana Ankit Bende; Sachin Patkar; Rolf Drechsler; Farhad Merchant

    MemSPICE: Automated Simulation and Energy Estimation Framework for MAGIC-Based Logic-in-Memory

    In: 29th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2024), January …

  4. Chandan Jha; Sallar Ahmadi-Pour; Rolf Drechsler

    Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.

  5. Ankit Bende; Simranjeet Singh; Chandan Jha; Tim Kemper; Felix Cüppers; Christopher Bengel; Andre Zambanini; Dennis Nielinger; Sachin Patkar; Rolf Drechsler; Rainer Waser; Farhad Merchant; Vikas Rana

    Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

    In: 37 International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.

  6. Complete and Efficient Verification for a RISC-V Processor using Formal Verification

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  7. Dynamic Realization of Multiple Control Toffoli Gate

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25 - February 27, Valencia, Spain, …

  8. Soumya Sengupta; Abhoy Kole; Kamalika Datta; Indranil Sengupta; Rolf Drechsler

    AQuCiDe: Architecture Aware Decomposition of Quantum Circuits

    In: Himanshu Thapliyal; Travis Humble. Quantum Computing: Circuits, Systems, Automation and Applications. Pages 69-87, Springer, 2024.

  9. Towards Completeness: Security Coverage for System Level IFT

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  10. Towards ML-based Performance Estimation of Embedded Software: A RISC-V Case Study

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …