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Publications

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  1. Security Coverage Metrics for Information Flow at the System Level

    In: 29th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2024), January …

  2. Complete and Efficient Verification for a RISC-V Processor using Formal Verification

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  3. Towards Completeness: Security Coverage for System Level IFT

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  4. Towards ML-based Performance Estimation of Embedded Software: A RISC-V Case Study

    In: Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV). ITG/GMM/GI-Workshop "Methoden und …

  5. Muhammad Hassan; Sallar Ahmadi-Pour; Khushboo Qayyum; Chandan Kumar Jha; Rolf Drechsler

    LLM-guided Formal Verification Coupled with Mutation Testing

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  6. Jan Zielasko; Rune Krauss; Marcel Merten; Rolf Drechsler

    Improving Virtual Prototype Driven Hardware Optimization by Merging Instruction Sequences

    In: 27th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and …

  7. Khushboo Qayyum; Muhammad Hassan; Sallar Ahmadi-Pour; Chandan Kumar Jha; Rolf Drechsler

    Late Breaking Results: LLM-assisted Automated Incremental Proof Generation for Hardware Verification

    In: 61st Design Automation Conference (DAC). Design Automation Conference (DAC-2024), June 23-27, San Francisco, USA, 2024.

  8. Kemal Çağlar Coşkun; Muhammad Hassan; Lars Hedrich; Rolf Drechsler

    Efficient Equivalence Checking of Nonlinear Analog Circuits using Gradient Ascent

    In: 61st Design Automation Conference (DAC). Design Automation Conference (DAC), June 23-27, San Francisco, USA, 2024.

  9. Jan Zielasko; Rune Krauss; Marcel Merten; Rolf Drechsler

    RISC-V Opt-VP: An Application Analysis Platform Using Bounded Execution Trees

    In: RISC-V Summit Europe. RISC-V Summit Europe, June 24-28, München, Germany, 2024.

  10. Sallar Ahmadi-Pour; Muhammad Hassan; Rolf Drechsler

    Cross-Level Verification of Hardware Peripherals

    In: RISC-V Summit Europe. RISC-V Summit Europe, June 24-28, München, Germany, 2024.