Publikationen

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Niklas Bruns; Vladimir Herdt; Rolf Drechsler
Processor Verification using Symbolic Execution: A RISC-V Case-Study
In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.
Sören Tempel; Tobias Brandt; Christoph Lüth
Versatile and Flexible Modelling of the RISC-V Instruction Set Architecture
In: 24th International Symposium on Trends in Functional Programming (TFP). International Symposium on Trends in Functional Programming (TFP-2023), …
Muhammad Hassan; Rolf Drechsler
Expanding RISC-V Horizons: Streamlining Heterogeneous Systems Evaluation with Open Source RISC-V AMS VP Framework
In: RISC-V Summit Europe 2023. RISC-V Summit Europe, June 5-9, Barcelona, Spain, 2023.
Sören Tempel; Tobias Brandt; Christoph Lüth; Rolf Drechsler
Minimally Invasive Generation of RISC-V Instruction Set Simulators from Formal ISA Models
In: Forum on specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2023), September 13-15, Turin, Italy, 2023.
Weiyan Zhang; Mehran Goli; Muhammad Hassan; Rolf Drechsler
Efficient ML-Based Performance Estimation Approach across Different Microarchitectures for RISC-V Processors
In: Euromicro Conference Series on Digital System Design (DSD). Euromicro Conference on Digital System Design (DSD-2023), September 6-8, Durres, …
Jan Zielasko; Rolf Drechsler
Virtual Prototype driven Application Specific Hardware Optimization
In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2023), September 13-15, Turin, Italy, 2023.
Alexander Fratzer; Vladimir Herdt; Christoph Lüth; Rolf Drechsler
Virtual Prototype based Analysis of Neural Network Cache Behavior for Tiny Edge Device
In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2022), September 14-16, Linz, Austria, 2022.
Niklas Bruns; Vladimir Herdt; Rolf Drechsler
Unified HW/SW Coverage: A Novel Metric to Boost Coverage-guided Fuzzing for Virtual Prototype based HW/SW Co-Verification
In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2022), September 14-16, Linz, Austria, 2022.
Jan Zielasko; Sören Tempel; Vladimir Herdt; Rolf Drechsler
3D Visualization of Symbolic Execution Traces
In: Forum on Specification & Design Languages (FDL). Forum on Specification & Design Languages (FDL-2022), September 14-16, Linz, Austria, 2022.
Weiyan Zhang; Mehran Goli; Alireza Mahzoon; Rolf Drechsler
ANN-based Performance Estimation of Embedded Software for RISC-V Processors
In: 33rd International Workshop on Rapid System Prototyping (RSP). International Symposium on Rapid System Protoyping (RSP-2022), October 13-14, …