Synchronized Debugging across Different Abstraction Levels in System Design

Rolf Drechsler, Daniel Große, Hoang M. Le, André Sülflow

In: Embedded World Conference 2013. Embedded World Conference February 26-28 Nuremberg Germany 2013.


Developing complex systems such as today's System-on-Chips (SoCs) under tight time-to-market constraints is an extremely challenging task. To cope with the rapidly increasing complexity, the level of abstraction has been raised beyond RTL to the so-called Electronic System Level (ESL). In typical ESL design flows, the design is started from the textual specification. Then the golden model is built using abstract ESL languages such as SystemC. This model is used by several teams focusing on different aspects, like performance analysis and early software development. At the same time the refinement process starts and IP components are integrated. Finally, an RTL model is built for the hardware part of the system. However, in practice the design process is not an ideal incremental top-down design process. Therefore, bugs can be found during the different refinement steps. Hence, it is important to have the respective models in sync. In this paper we consider debugging approaches at different levels of abstractions and show how to relate the debugging results across the abstraction levels. Following this methodology, the productivity of the whole design process is accelerated because each team always works on the latest correct design.

German Research Center for Artificial Intelligence
Deutsches Forschungszentrum für Künstliche Intelligenz