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Year: 2024
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Displaying results 21 to 30 of 241.

  1. Andreas Emrich; Oliver Gutermuth; Michael Frey; Peter Fettke; Peter Loos

    Towards a Model Factory Experimentation Environment for Cyber-Physical Twins

    In: Tung Bui (Hrsg.). Proceedings of the 57th Hawaiian International Conference on Systems Science. Hawaii International Conference on System Sciences …

  2. Mahdi Chamseddine; Jason Raphael Rambach; Didier Stricker

    CaRaCTO: Robust Camera-Radar Extrinsic Calibration with Triple Constraint Optimization

    In: International Conference on Pattern Recognition Applications and Methods. International Conference on Pattern Recognition Applications and Methods …

  3. Andreas Luxenburger; Jonas Mohr; Dieter Merkel; Sönke Knoch; Daniel Porta; Christian Paul; Johannes Widenka; Philipp Schäfers; Markus Baumann; Stefan Lehnhoff; Joachim Schwab

    Interactive Digital Twins for Online Planning and Worker Safety in Intralogistics and Production

    In: Proceedings of the 6th IEEE International Conference on Artificial Intelligence & extended and Virtual Reality. IEEE International Conference on …

  4. Shishir Muralidhara; Sravan Kumar Jagadeesh; René Schuster; Didier Stricker

    JPPF: Multi-task Fusion for Consistent Panoptic-Part Segmentation

    In: SN Computer Science (SNCS), Vol. 5, Pages 0-16, Springer, 2024.

  5. Soumya Sengupta; Abhoy Kole; Kamalika Datta; Indranil Sengupta; Rolf Drechsler

    AQuCiDe: Architecture Aware Decomposition of Quantum Circuits

    In: Himanshu Thapliyal; Travis Humble. Quantum Computing: Circuits, Systems, Automation and Applications. Pages 69-87, Springer, 2024.

  6. Abhoy Kole; Arighna Deb; Kamalika Datta; Rolf Drechsler

    Dynamic Realization of Multiple Control Toffoli Gate

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25 - February 27, Valencia, Spain, …

  7. Lennart Weingarten; Kamalika Datta; Abhoy Kole; Rolf Drechsler

    Complete and Efficient Verification for a RISC-V Processor using Formal Verification

    In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.

  8. Fatemeh Shirinzadeh; Arighna Deb; Saeideh Shirinzadeh; Abhoy Kole; Kamalika Datta; Rolf Drechsler

    In-Memory SAT-Solver for Self-Verification of Programmable Memristive Architectures

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 1/2024.

  9. Ankit Bende; Simranjeet Singh; Chandan Jha; Tim Kemper; Felix Cüppers; Christopher Bengel; Andre Zambanini; Dennis Nielinger; Sachin Patkar; Rolf Drechsler; Rainer Waser; Farhad Merchant; Vikas Rana

    Experimental Validation of Memristor-Aided Logic Using 1T1R TaOx RRAM Crossbar Array

    In: 37 International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.

  10. Chandan Jha; Sallar Ahmadi-Pour; Rolf Drechsler

    Input Distribution Aware Library of Approximate Adders Based on Memristor-Aided Logic

    In: 37th International Conference on VLSI Design (VLSID). International Conference on VLSI Design (VLSID-2024), Kolkata, India, 2024.

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