Publications

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Sajjad Parvin; Chandan Kumar Jha; Frank Sill Torres; Rolf Drechsler
True-PolyTronik: Securing Circuits Against Laser Logic State Imaging Attack Using RFET
In: 38th International Conference on VLSI Design. International Conference on VLSI Design (VLSID-2025), 38th, January 4-8, Bengaluru, India, 2025.
Paul Flammarion; Sajjad Parvin; Frank Sill Torres; Rolf Drechsler
Auto-OPS: A Framework For Automated Optical Probing Simulation on GDS-II
In: Proceedings of the 7th International Workshop on Secure Hardware, Architecture, and Software (SeHAS'2025). International Workshop on Secure Hardware, Architecture, and Software (SeHAS-2025), located at HiPEAC 2025, January 21, Barcelona, Spain, 2025.
Sajjad Parvin; Chandan Jha; Frank Sill Torres; Rolf Drechsler
Hidden Cost of Circuit Design with RFETs
In: Design, Automation and Test in Europe Conference (DATE). Design, Automation & Test in Europe (DATE-2024), March 25-27, Valencia, Spain, 2024.
Sajjad Parvin; Mehran Goli; Frank Sill Torres; Rolf Drechsler
OPTI-Sim: Performing Optical Probing Simulation on Layout Design Files
In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), IEEE, 2024.
Sajjad Parvin; Sallar Ahmadi-Pour; Chandan Jha; Frank Sill Torres; Rolf Drechsler
Lower the RISC: Designing optical-probing-attack-resistant cores
In: Microprocessors and Microsystems (MICPRO), Vol. 111, Elsevier, 2024.
Sajjad Parvin; Sallar Ahmadi-Pour; Chandan Kumar Jha; Frank Sill Torres; Rolf Drechsler
Lower the RISC: Designing optical-probing-attack-resistant cores
In: Microprocessors and Microsystems (MICPRO), Vol. 111, Elsevier, 2024.
Paul Flammarion; Sajjad Parvin; Frank Sill Torres; Rolf Drechsler
Auto-OPS: A Framework For Automated Optical Probing Simulation on GDS-II
In: IEEE Embedded Systems Letters (ESL), IEEE, 2024.
Sajjad Parvin; Mehran Goli; Frank Sill Torres; Rolf Drechsler
FELOPi: A Framework for Simulation and Evaluation of Post-Layout File Against Optical Probing
In: Design, Automation and Test in Europe (DATE). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.
Sajjad Parvin; Mehran Goli; Frank Sill Torres; Rolf Drechsler
Trojan-D2: Post-Layout Design and Detection of Stealthy Hardware Trojans - a RISC-V Case Study
In: Proceedings of the 28th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2023), January 16-19, Tokyo, Japan, 2023.
Sajjad Parvin; Mehran Goli; Thilo Krachenfels; Shahin Tajik; Jean-Pierre Seifert; Frank Sill Torres; Rolf Drechsler
LAT-UP: Exposing Layout-Level Analog Hardware Trojans Using Contactless Optical Probing
In: IEEE Computer Society Annual Symposium on VLSI. IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2023), June 20-23, Iguazu Falls, Brazil, 2023.