Skip to main content Skip to main navigation

Publications

Page 1 of 2.

  1. Fritjof Bornebusch; Christoph Lüth; Robert Wille; Rolf Drechsler

    Performance Aspects of Correctness-oriented Synthesis Flows

    In: 9th International Conference on Model-Driven Engineering and Software Development (MODELSWARD). International Conference on Model-Driven Engineering and Software Development (MODELSWARD-2021), 9th, February 8-10, Online-Conference, 2021.

  2. Fritjof Bornebusch; Christoph Lüth; Robert Wille; Rolf Drechsler

    Safety First: About the Detection of Arithmetic Overflows in Hardware Design Specifications

    In: Slimane Hammoudi; Luís Ferreira Pires; Bran Selić (Hrsg.). 8th International Conference on Model-Driven Engineering and Software Development (MODELSWARD), Revised Selected Papers. International Conference on Model-Driven Engineering and Software Development (MODELSWARD-2020), February 25-27, Valletta, Malta, Springer, 2021.

  3. Fritjof Bornebusch; Christoph Lüth; Robert Wille; Rolf Drechsler

    Towards Automatic Hardware Synthesis from Formal Specification to Implementation

    In: 25th Asia and South Pacific Design Automation Conference (ASP-DAC). Asia and South Pacific Design Automation Conference (ASP-DAC-2020), 25th, January 13-16, Beijing, China, 2020.

  4. Fritjof Bornebusch; Christoph Lüth; Robert Wille; Rolf Drechsler

    Integer Overflow Detection in Hardware Designs at the Specification Level

    In: 8th International Conference on Model-Driven Engineering and Software Development (MODELSWARD). International Conference on Model-Driven Engineering and Software Development (MODELSWARD-2020), February 25-27, Valetta, Malta, 2020.

  5. Martin Ring; Fritjof Bornebusch; Christoph Lüth; Robert Wille; Rolf Drechsler

    Verification Runtime Analysis: Get the Most Out of Partial Verification

    In: Design, Automation & Test in Europe. Design, Automation & Test in Europe (DATE-2020), March 9-13, Grenoble, France, IEEE, 2020.

  6. Martin Ring; Christoph Lüth

    Let's Prove It Later --- Verification at Different Points in Time

    In: Peter Csaba Ölveczky; Gwen Salaün (Hrsg.). Software Engineering and Formal Methods - 17th International Conference, Proceedings. International Conference on Software Engineering and Formal Methods (SEFM-2019), September 16-20, Oslo, Norway, Pages 454-468, Lecture Notes in Computer Science (LNCS), Vol. 11724, ISBN 978-3-030-30446-1, Springer, Cham, 9/2019.

  7. Martin Ring; Fritjof Bornebusch; Christoph Lüth; Robert Wille; Rolf Drechsler

    Better Late Than Never: Verification of Embedded Systems After Deployment

    In: Design, Automation & Test in Europe. Design, Automation & Test in Europe (DATE-2019), March 25-29, Florence, Italy, 2019.

  8. Kenneth Schmitz; Buse Ustaoglu; Daniel Große; Rolf Drechsler

    (ReCo) Fuse Your PRC or Lose Security: Finally Reliable Reconfiguration-based Countermeasures on FPGAs

    In: Proceedings of the 15th International Symposium on Applied Reconfigurable Computing (ARC). International Symposium on Applied Reconfigurable Computing (ARC-2019), April 9-11, Darmstadt, Germany, 2019.

  9. Rehab Massoud; Hoang M. Le; Peter Chini; Prakash Saivasan; Roland Meyer; Rolf Drechsler

    Temporal Tracing of On-chip Signals using Timeprints

    In: Design Automation Conference (DAC). Design Automation Conference (DAC-2019), June 2-6, Las Vegas, Nevada, USA, 2019.

  10. Saman Fröhlich; Saeideh Shirinzadeh; Rolf Drechsler

    Logic Synthesis for Hybrid CMOS-ReRAM Sequential Circuits

    In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2019. IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2019), July 15-17, Miami, Florida, USA, 2019.