STELEC, short for Sustainable Textile ELECtronics, is an interdisciplinary research project funded by the European Innovation Council (EIC) under the Pathfinder programmes in the responsible electroni
This project is based on the insight that in order to significantly reduce the CO2 footprint of ML applications power-aware applications must be as easy to develop as standard ML systems are today. Us
Ziel des Projektes VerSys ist die Entwicklung einer konsistenten Entwicklungsplattform für die frühzeitige Software-Entwicklung auf Basis der RISC-V-Technologie, einer Befehlssatzarchitektur für Mikro