Ignore Clocking Constraints: An Alternative Physical Design Methodology for Field-coupled Nanotechnologies

Robert Wille, Marcel Walter, Frank Sill Torres, Daniel Große, Rolf Drechsler

In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI) 2019. IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2019) July 15-17 Miami Florida United States 2019.


Field-Coupled Nanocomputing(FCN) allows for con-ducting computations with a power consumption that is magni-tudes below current CMOS technologies. Recent physical imple-mentations confirmed these prospects and put pressure on theElectronic Design Automation(EDA) community to develop physi-cal design methods comparable to those available for conventionalcircuits. While the major design task boils down to a place androute problem, certain characteristics of FCN circuits introducefurther challenges in terms of dedicated clock arrangementswhich lead to rather cumbersome clocking constraints. Thus far,those constraints have been addressed in a rather unsatisfactoryfashion only.In this work, we propose a physical design methodology whichtackles this problem by simply ignoring the clocking constraintsand using adjusted conventional place and route algorithms.In order to deal with the resulting ramifications, a dedicatedsynchronization elementis introduced. Results extracted froma physics simulator confirm the feasibility of the approach. Aproof of concept implementation illustrates that ignoring clockingconstraints indeed allows for a promising alternative directionfor FCN design that overcomes the obstacles preventing thedevelopment of efficient solutions thus far.

Deutsches Forschungszentrum für Künstliche Intelligenz
German Research Center for Artificial Intelligence