Logic Synthesis for In-Memory Computing using Resistive Memories

Saeideh Shirinzadeh, Rolf Drechsler

In: IEEE Computer Society Annual Symposium on VLSI (ISVLSI). IEEE Computer Society Annual Symposium on VLSI (ISVLSI-2018) July 9-11 Hong Kong SAR China 2018.


The increasing urge to bypass the issue of the memory bottleneck in the current computer architectures has attracted high attention to in-memory computing enabled by emerging memory technologies such as Resistive Random Access Memory (RRAM). This paper studies in-memory computing from two perspectives, i.e. customized and instruction-based. The customized approach exploits logic representations to synthesize for in-memory computing. The approach proposes design methodologies and optimization algorithms for each representation with respect to area and latency upon the realizations of their logic primitives. The instruction-based approach proposes an automatic compiler to execute instructions on a logic-in-memory computer architecture and optimizes the programs. Experimental results for both approaches revea

Deutsches Forschungszentrum für Künstliche Intelligenz
German Research Center for Artificial Intelligence