Publikation
Prompt. Verify. Repeat. LLMs in the Hardware Verification Cycle
Muhammad Hassan; Mohamed Nadeem; Khushboo Qayyum; Chandan Jha; Rolf Drechsler
In: 2025 IEEE International Conference on Omni-layer Intelligent Systems (COINS). IEEE International Conference on Omni-layer Intelligent Systems (IEEE COINS-2025), August 4-6, Wisconsin, USA, IEEE, 2025.
Zusammenfassung
In this paper, we review the use of Large Language
Models (LLMs) in the context of hardware verification, using the
concept of a semantic layer to organize their role. We place LLMs
within a centaur-style workflow and describe their operation as
an iterative loop, Prompt. Verify. Repeat.. In this loop, an LLM
is first prompted to generate or modify a verification artifact.
The artifact is then evaluated using standard EDA tools and
human review. Based on the results, the prompt or constraints
are adjusted, and the process is repeated until the verification objectives are met. Within this structure, LLMs function alongside
existing tools to support the verification process. Furthermore, we
present a simple example of illustrating this concept in deductive
reasoning in hardware verification as an application.