Enhancing Robustness of Sequential Circuits Using Application-specific Knowledge and Formal Methods

Sebastian Huhn; Stefan Frehse; Robert Wille; Rolf Drechsler

In: 22nd Asia and South Pacific Design Automation Conference ASP-DAC 2017. Asia and South Pacific Design Automation Conference (ASP-DAC-22), January 16-19, Tokio, Japan, 2017.


Due to shrinking feature sizes, integrated circuits are getting more vulnerable against transient faults. Methods increasing the robustness of circuits against these faults already exist for a long period of time but either introduce huge additional logic, increase the latency of the circuit, or are applicable for dedicated circuits such as microprocessors only. This work proposes an alternative hardening method which requires only a slight increase in additional hardware, does not influence the timing behavior, and is automatically applicable to arbitrary circuits. To this end, application-specific knowledge of the considered circuit is exploited, analyzed by a dedicated orchestration of formal techniques, and, eventually, used to synthesize a fault detection mechanism enhancing the robustness of the circuit. Experimental evaluations show that the proposed solution leads to a significant increase in the robustness, while the hardware overhead is kept moderate.

16_ASPDAC_robustness.pdf (pdf, 1 MB )

Deutsches Forschungszentrum für Künstliche Intelligenz
German Research Center for Artificial Intelligence