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Publikationen

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  1. Jan Zielasko; Rune Krauss; Marcel Merten; Rolf Drechsler

    Improving Virtual Prototype Driven Hardware Optimization by Merging Instruction Sequences

    In: 27th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2024), April 3-5, Kielce, Poland, 2024.

  2. Marcel Merten; Mohammed E. Djeridane; Muhammad Hassan; Niladri Bhattacharjee; Jens Trommer; Thomas Mikolajick; Rolf Drechsler

    Enhancing Resilience against Sequential Attacks on Logic Locking using Evolutionary Strategies

    In: 36. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ). GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ-2024), February 25-27, Darmstadt, Germany, 2024.

  3. Jan Zielasko; Rune Krauss; Marcel Merten; Rolf Drechsler

    RISC-V Opt-VP: An Application Analysis Platform Using Bounded Execution Trees

    In: RISC-V Summit Europe. RISC-V Summit Europe, June 24-28, München, Germany, 2024.

  4. Jens Trommer; Niladri Bhattacharjee; Thomas Mikolajick; Sebastian Huhn; Marcel Merten; Mohammed E. Djeridane; Muhammad Hassan; Rolf Drechsler; Shubham Rai; Nima Kavand; Armin Darjani; Akash Kumar; Violetta Sessi; Maximilian Drescher; Sabine Kolodinski; Maciej Wiatr

    Design Enablement Flow for Circuits with Inherent Obfuscation based on Reconfigurable Transistors

    In: Design, Automation and Test in Europe Conference (DATE 2023). Design, Automation & Test in Europe (DATE-2023), April 17-19, Antwerp, Belgium, 2023.

  5. Marcel Merten; Sebastian Huhn; Rolf Drechsler

    Increasing SAT-Resilience of Logic Locking Mechanisms using Formal Methods

    In: 28th IEEE European Test Symposium 2023. IEEE European Test Symposium (ETS-2023), May 22-26, Venice, Italy, 2023.

  6. Marcel Merten; Muhammad Hassan; Rolf Drechsler

    Quality Assessment of Logic Locking Mechanisms using Pseudo-Boolean Optimization Techniques

    In: Marcel Merten; Muhammad Hassan; Rolf Drechsler (Hrsg.). 26th Design & Diagnostics of Electronic Circuits & Systems (DDECS). IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS-2023), May 3-5, Tallinn, Estonia, 2023.

  7. Marcel Merten; Rune Krauss; Rolf Drechsler

    Scalable Neuroevolution of Ensemble Learners

    In: The Genetic and Evolutionary Computation Conference (GECCO). The Genetic and Evolutionary Computation Conference (GECCO-2023), July 15-19, Lisbon, Portugal, 2023.

  8. Marcel Merten; Mohammed E. Djeridane; Sebastian Huhn; Rolf Drechsler

    SAT-Based Key Determination Attack for Improving the Quality Assessment of Logic Locking Mechanisms

    In: Rolf Drechsler; Sebastian Huhn. Advanced Boolean Techniques. Pages 83-94, Springer, 2023.

  9. Marcel Merten; Sebastian Huhn; Rolf Drechsler

    Quality Assessment of RFET-based Logic Locking Protection Mechanisms using Formal Methods

    In: 34. GI/GMM/ITG Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ). GI/GMM/ITG Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ-2022), February 27 - March 1, Bremerhaven, Germany, 2022.

  10. Marcel Merten; Sebastian Huhn; Rolf Drechsler

    A Hardware-based Evolutionary Algorithm with Multi-Objective Optimization Operators for On-Chip Transient Fault Detection

    In: 40th IEEE VLSI Test Symposium (VTS). IEEE VLSI Test Symposium (VTS-2022), April 25-27, San Diego, USA, 2022.